1. Field of the Invention
This invention relates generally to switch mode power converters which include an electromagnetic component, and more particularly to techniques designed to maintain the flux balance in an electromagnetic component of such a converter.
2. Description of the Related Art
There are a number of switch mode converter topologies which include an electromagnetic component such as a transformer or motor; examples include half-bridge, full-bridge, 4-switch buck-boost and push-pull topologies. In normal operation, the electromagnetic component conducts a current which periodically reverses direction. This results in a magnetic flux in the component which, if not kept balanced, can result in flux saturation and output voltage regulation failure.
The operation of such a converter 10 is illustrated with reference to FIG. 1, which depicts a half-bridge switch mode converter topology. On the primary side of the converter, a control unit 12 provides ‘switch drive’ signals 14 to switching elements Q1 and Q2 to control the direction of current through the primary winding of a transformer T1; the converter operates with an associated switching cycle, during which current flows through T1 in both positive and negative directions. A capacitor divider network consisting of capacitors C1 and C2 is connected as shown; ideally, C1 and C2 have the same capacitance value, and the average voltages across them in one switching period are equal. When this is the case, the voltage at central node B is Vin/2, where Vin is the DC input voltage. The secondary side of the converter includes the secondary winding of T1, synchronous rectifiers Q3 and Q4, and an output inductor and capacitor across which the converter's output voltage Vo is provided. The primary and secondary sides together are referred to herein as the ‘main stage’.
One switching cycle can be divided into two half-cycles, during which switches Q1 and Q2 conduct alternatively. For example, in a first half-cycle, Q1 is turned on and Q2 is turned off, and C1 discharges through Q1 and T1 while C2 is charged. In a second half-cycle, Q1 is turned off and Q2 is turned on, C1 is charged by input voltage Vin, and C2 discharges through Q2 and T1. The ON time of Q1 or Q2 (or the duty cycle) in each half-cycle is controlled, typically using pulse-width (PWM) or pulse-frequency modulation (PFM), to regulate the output voltage Vo.
However, due to variations between, for example, the capacitances of C1 and C2 and the delay times for the switch drive signals, the voltage at center node B may drift up or down over time. However, when the converter employs “voltage-mode” control, the voltage drift at the center node B of the capacitor divider acts as negative feedback which prevents transformer T1 from becoming saturated.
But even with voltage-mode control, a magnetic flux balance problem can develop when a current in the main stage exceeds a predetermined limit threshold. A voltage-mode control system typically does not have a peak current limit function as is commonly found in a peak current-mode control system. This is usually remedied with the addition of an additional current limit module; one possible module is referred to herein as a “cycle-by-cycle limit module”, which senses the real time current in the main stage and compares it with a reference limit signal. This module senses short circuit or over-current conditions, and responds by limiting the primary side or secondary side current in each half-cycle. Once this reference limit is reached or exceeded, an over-current flag may be generated to shut down the switch drive signals. Then, the system may enter a cycle-by-cycle limit mode during which the switch drive signals in the first and/or second half-cycles of a switching period are terminated whenever the sensed current reaches the reference limit.
However, as a result of the operation of a cycle-by-cycle limit module, the switch drive signals may be terminated such that they have different ON times in the two half-cycles. This is a duty cycle (or ON time) imbalance. As a result, the capacitor discharging during the half-cycle which has a longer ON time discharges more current than does the capacitor discharging in the half-cycle with the shorter ON time. This causes the voltage on the capacitor which discharges longer to be lower than the voltage on the other capacitor. It is known that if the voltage applied across the transformer in one half-cycle is different from the voltage applied in the other half-cycle, the rate at which the transformer current increases in one half-cycle will be different from the increase rate in the other half-cycle. As such, the current in the longer ON time half-cycle needs more time to reach the reference limit than does the current in the short ON time half-cycle. In fact, the other capacitor gets charged to a higher voltage and requires a shorter ON time to let the current hit the reference limit. Therefore, after a series of duty cycle (or ON time) imbalances over a number of half-cycles, the center node voltage of the capacitor divider can drift from Vin/2 towards either the ground or the input voltage. This simple cycle-by-cycle limit module always reinforces this trend, which can lead to flux saturation in the main transformer, output voltage regulation failure, and high voltage stress across the drain and source terminals of the synchronous rectifiers on the converter's secondary side.